일반적인 경우, VHLD에서 Register의 값은 system reset 신호에 의해 async로 초기화를 해주게 된다.
그런데 어떤 특이한 케이스에서 Power-on 시에 (system reset으로 제어할수가 없어서) 초기값을 설정해야 할 필요가 있었다.
사용하는 M3000 시리즈의 EPM3128의 manual을 참조하면 모든 register는 Power-Up 시점에 clear 된다고 나와 있고 "Power-Up Level logic option" 을 사용해서 그 값을 선택할 수 있다고 되어 있다. (Quartus에서만 가능하다고 되어 있음)
그런데 막상 아무리 저 값을 setting 해봐도 정상적으로 동작하는 것 같지는 않았다 아무래도 Quartus version과 해당 Device 등등과 관련되어 있는 듯
시간날 때 다시 한 번 확인해보고 정리할 필요는 있을 것 같음.
A logic option that causes a register to power up with the specified logic level, either High (1) or Low (0). If this option is specified for an input pin, it is automatically transferred to the register that is driven by the pin if the following conditions are present:
There is no intervening logic, other than inversion, between the pin and the register.
The input pin drives the data input of the register.
The input pin does not fan-out to any other logic.
If this option is specified for an output or bidirectional pin, it is automatically transferred to the register that feeds the pin if:
There is no intervening logic, other than inversion, between the register and the pin.
The register does not fan-out to any other logic.
This option is ignored if it is assigned to anything other than a register, or to a pin with any logic configuration other than those described above. In order for the register to power up with the specified logic level, the Compiler may perform NOT Gate Push-Back on the register. You can assign the Power-Up Level option to any register. This option can be set in the Assignment Editor (Assignments menu). This option is available for all Altera® devices supported by the Quartus® II software.
The following table provides the information necessary for creating and editing assignments directly in the Quartus II Settings File (.qsf) or by using Tcl or command-line commands. The QSF keyword is highlighted in green in the Command-Line Syntax column. A value highlighted in green in the Settings column indicates the default setting.
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